With the logic analyzer connected to the FPGA through a JTAG port, FPGAView controls which internal FPGA signals are mapped to the output pins for realtime display and debug. This debug approach not ...

When you think of a logic analyzer today, you might think of a little USB probe that can measure a few signals and decoding for various serial buses. But actual logic analyzers were high-speed ...

Saleae logic analyzers seem to have it all: good sampling rates, convenient protocol decoding, and plenty of channels – but not a good way to set rising or falling-edge triggering. [James] found this ...

With mixed-signal oscilloscopes (MSOs) being everyone’s “Engineering” Swiss Army knife, why would anyone need an additional logic analyzer? MSOs with sampling rates in the GHz range and 8 or more ...

When the microprocessor and inexpensive ROM memory arrived in the early 1970s, building small, stored-program computing systems became practical. System designers learned that with the rapidly growing ...

When ICs first became available to electronics engineers 30 years ago, oscilloscopes could no longer do the job. Asynchronous logic designs with multiple pins gave rise to multipath race conditions.

As I mentioned in my recent columns on the topic of adding pull-up or pull-down resistors to the inputs of unused or partially used logic gates and functions (see Part 1, Part 2, and Part 3), I was ...